// interface pico and botsim (reference - kcpms6_design_tem.v)

module nexys3_bot_if (
    input [7:0] port_id,
	input [7:0] out_port,
	input [7:0] loc_x,
	input [7:0] loc_y,
	input [7:0] bot_info,
	input [7:0] sensors,
	input [7:0] Lm_dist,
	input [7:0] Rm_dist,
	input upd_sysregs,
	input write_strobe,
	input read_strobe,
	input interrupt_ack,
	input [7:0] db_sw,
	input [4:0] db_btns,
	input clk,
	input reset,
	output reg [4:0] dig3,
	output reg [4:0] dig2,
	output reg [4:0] dig1,
	output reg [4:0] dig0,
	output reg [3:0] decpt,
	output reg [7:0] motctl,
    output reg [7:0] in_port,
	output reg interrupt,   
    output reg [7:0] LED      
);
				
				
// internal reg 

// reg [7:0]	MotCtl_int,		
			// IntFF_int,	
			// Dig3_int,	
			// Dig2_int,	
			// Dig1_int,
            // Dig0_int,	
			// Decpt_int,	
            // LED_int;

			
always @(posedge clk) 
    begin
		if (interrupt_ack == 1)
			interrupt <= 0;
		else begin
			if (upd_sysregs == 1)
				interrupt <= 1;
			else
				interrupt <= interrupt;
			end;
        //end if;
    end;

	 // read registers
always @(*) begin
	//in_port <= in_port;
	case (port_id[3:0])
		4'b1010 :	in_port <= loc_x;
		4'b1011 :	in_port <= loc_y;
		4'b1100 :	in_port <= bot_info;
		4'b1101 :	in_port <= sensors;
		4'b0001 :	in_port <= db_sw;
		4'b0000 :	in_port <= {3'b000,db_btns[0],db_btns[4:1]};
		4'b1110 :   in_port <= Lm_dist;
		4'b1111 :   in_port <= Rm_dist;
		//4'b0111 :   in_port <= {4'b0000,decpt};
		default :	in_port <= 8'h00;
	endcase
end // always - read registers


// write registers
always @(posedge clk or posedge reset) begin
	if (reset) begin
		motctl <= 0;
		//interrupt <= 0;
		dig3 <= 0;
		dig2 <= 0;
		dig1 <= 0;
		dig0 <= 0; 
		decpt<= 0;
		LED <= 0;
	end
	else if(write_strobe) begin
			case (port_id[3:0])
				// I/O registers for rojobot simulator HW interface
				4'b1001 :    motctl <= out_port	;
				//4'b00XX :	 interrupt  <=  out_port;
				4'b0011 :    dig3  <= out_port[4:0];
				4'b0100 :	 dig2  <= out_port[4:0];	 
				4'b0101 :	 dig1  <= out_port[4:0];
            4'b0110 :    dig0  <= out_port[4:0];	 
				4'b0111 : 	 decpt <= out_port[3:0];	 
				4'b0010 :	 LED   <= out_port;	
			endcase
		end
	else begin // refresh registers
		dig3       <=dig3    ;
		dig2       <=dig2    ;
		dig1       <=dig1    ;
		dig0       <=dig0    ;
		decpt      <=decpt   ;
		motctl     <=motctl  ;
		//interrupt  <=interrupt ;
		LED        <=LED    ;  
	end
end // always - write registers

endmodule